DocumentCode
160187
Title
Local residual stresses in tungsten coated TSVs characterized by synchrotron X-ray nanodiffraction and Raman spectroscopy
Author
Defregger, S. ; Steffenelli, M. ; Deluca, M. ; Maier, G. ; Sartory, B. ; Burghammer, M. ; Kraft, J. ; Carniello, S. ; Keckes, J.
Author_Institution
Mater. Center Leoben Forschung GmbH, Leoben, Austria
fYear
2014
fDate
16-18 Sept. 2014
Firstpage
1
Lastpage
2
Abstract
Metallization of through silicon vias (TSVs) used for the wafer interconnection in three-dimensional integration possess usually a certain amount of tensile residual stresses which originate from the mismatch of the coefficients of thermal expansion between the metal and silicon. In this contribution, novel experimental approaches based on the synchrotron X-ray nanodiffraction and Raman spectroscopy are used to determine residual stresses in tungsten coated TSVs, in the metal as well as in the surrounding silicon. The results indicate that the stresses in silicon surrounding the TSVs are relatively negligible but the stress state in the tungsten film can be high. Moreover, the ripple-like morphology of the tungsten thin film results in the stress magnitude oscillations across the via wall. Finally, the complementary X-ray and Raman approaches document that both techniques can serve as an effective tool to monitor the stress state with a spatial resolution down to 100nm and to analyze degradation effects caused by the thermal and mechanical constrains in the chip.
Keywords
Raman spectroscopy; elemental semiconductors; integrated circuit interconnections; integrated circuit metallisation; silicon; synchrotrons; thermal expansion; thermal stresses; thin film devices; three-dimensional integrated circuits; tungsten; Raman spectroscopy; Si; TSV metallization; W; degradation effects; local residual stresses; mechanical constrains; ripple-like morphology; spatial resolution; stress magnitude oscillations; stress state; synchrotron X-ray nanodiffraction; tensile residual stresses; thermal constrains; thermal expansion; thin film; three-dimensional integration possess; through silicon vias; via wall; wafer interconnection; Residual stresses; Silicon; Synchrotrons; Tungsten; X-ray diffraction;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics System-Integration Technology Conference (ESTC), 2014
Conference_Location
Helsinki
Type
conf
DOI
10.1109/ESTC.2014.6962836
Filename
6962836
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