DocumentCode
1602002
Title
CMOS VCO design optimization using reliable 3D electromagnetic inductor models
Author
Diego, L. ; Jato, Yolanda ; Perez, C. ; Herrera, Alfredo
Author_Institution
Dept. of Commun. Eng., Univ. de Cantabria, Santander, Spain
fYear
2013
Firstpage
261
Lastpage
264
Abstract
Lack of reliable inductor models at high frequencies in SiGe makes the design of certain microwave circuits a tiresome task. This paper presents the design process of a fully integrated 11.6 GHz BiCMOS VCO with a good compromise between phase noise, power consumption and area. Inductors are essential components in the VCO design and therefore must be carefully modeled. We propose the use of a three dimensional electromagnetic field simulator to characterize the silicon integrated planar inductor within the VCO. Simulation and measurement results demonstrate how the use of an accurate inductor model can significantly reduce the designing steps leading to a first time working silicon.
Keywords
BiCMOS integrated circuits; Ge-Si alloys; inductors; integrated circuit design; integrated circuit modelling; phase noise; voltage-controlled oscillators; CMOS VCO design optimization; SiGe; design process; frequency 11.6 GHz; fully integrated BiCMOS VCO; microwave circuits; phase noise; power consumption; reliable 3D electromagnetic inductor models; silicon integrated planar inductor; three dimensional electromagnetic field simulator; Frequency measurement; Inductors; Integrated circuit modeling; Q-factor; Semiconductor device measurement; Solid modeling; Voltage-controlled oscillators; Electromagnetic simulation; inductor modeling; planar spiral inductors; voltage-controlled oscillator;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices (CDE), 2013 Spanish Conference on
Conference_Location
Valladolid
Print_ISBN
978-1-4673-4666-5
Electronic_ISBN
978-1-4673-4667-2
Type
conf
DOI
10.1109/CDE.2013.6481392
Filename
6481392
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