DocumentCode :
1602061
Title :
A framework for energy estimation of VLIW architecture
Author :
Kim, H.S. ; Vijaykrishnan, N. ; Kandemir, M. ; Irwin, M.J.
Author_Institution :
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
fYear :
2001
fDate :
6/23/1905 12:00:00 AM
Firstpage :
40
Lastpage :
45
Abstract :
VLIW architectures are being increasingly used in mobile environments where energy-efficiency is an important consideration. The energy efficiency of the VLIW architecture is determined by the underlying hardware and compiler technologies. In order to support efficient exploration of the energy tradeoffs of different architectural configurations and compiler optimizations, this work presents a new energy-estimation framework built over the Trimaran VLIW toolset. We investigate the influence of both architectural and compiler optimizations on energy-efficiency using the proposed framework
Keywords :
digital signal processing chips; instruction sets; parallel architectures; power consumption; program compilers; DSP chip; VLIW architecture; compiler; energy efficiency; energy estimation; optimizations; very long instruction word; Computer architecture; Computer science; Design optimization; Digital signal processing; Energy consumption; Hardware; Optimizing compilers; Registers; Statistics; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 2001. ICCD 2001. Proceedings. 2001 International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-6404
Print_ISBN :
0-7695-1200-3
Type :
conf
DOI :
10.1109/ICCD.2001.955001
Filename :
955001
Link To Document :
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