• DocumentCode
    160233
  • Title

    Flip-chip bonding processes with low volume SoP technology

  • Author

    Yong-Sung Eom ; Hak-Son Lee ; Hyun-Cheol Bae ; Kwang-Seong Choi ; Jin-Ho Lee

  • Author_Institution
    Electron. & Telecommun. Res. Inst., Daejeon, South Korea
  • fYear
    2014
  • fDate
    16-18 Sept. 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In order to build solder bumps with a fine-pitch of 100 μm and 130 μm on PCB substrate, low volume solder on pad (LVSoP) technology using a maskless technology was developed for SAC305 solder with a high melting temperature of 220°C. For the LVSoP process, SBM (solder bump maker) material was newly developed. The solder bump maker (SBM) paste and its process were quantitatively optimized to get a uniform height of solder bumps which are almost equal to the height of solder resist. Differential scanning calorimetry (DSC), viscosity measurement and physical flowing of SBM paste were precisely investigated and analyzed during LVSoP processing for an understanding of chemo-rheological phenomena of SBM paste. The average height of solder bumps and their maximum and minimum values were 14.7, 18.3 and 12.0 μm, respectively. It is believed that maskless LVSoP technology can be effectively used for a fine-pitch interconnection of a Cu pillar in the semiconductor packaging field. Flipchip bonding process between PCB substrate with low volume solder bumps and silicon device having the cupper pillars without solder caps was performed. As one of the key solution for fine pitch interconnection with Cu pillar for Flipchip bonding process, it is expected that LVSoP technology can be effectively used in semiconductor packaging.
  • Keywords
    bonding processes; copper alloys; differential scanning calorimetry; flip-chip devices; printed circuits; semiconductor device packaging; silver alloys; solders; tin alloys; viscosity measurement; DSC; PCB substrate; SBM paste; SnAgCu; chemo-rheological phenomena; copper pillars; differential scanning calorimetry; fine-pitch interconnection; flip-chip bonding processes; high melting temperature; low volume solder on pad technology; maskless LVSoP technology; maskless technology; semiconductor packaging field; silicon device; solder bump maker material; solder resist; temperature 220 degC; viscosity measurement; Bonding processes; Silicon; Silicon devices; Substrates; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics System-Integration Technology Conference (ESTC), 2014
  • Conference_Location
    Helsinki
  • Type

    conf

  • DOI
    10.1109/ESTC.2014.6962857
  • Filename
    6962857