Mixed-mode VLSI implementation of fuzzy ART

Author

Cohen, Marc ; Abshire, Pamela ; Cauwenberghs, Gert

Author_Institution

Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA

Volume

3

fYear

1998

Firstpage

251

Abstract

We present an asynchronous mixed analog-digital VLSI architecture which implements the Fuzzy Adaptive Resonance Theory (Fuzzy ART) algorithm. Both classification and learning are performed on-chip in real-time. Unique features of our implementation include: an embedded refresh mechanism to overcome memory drift due to charge leakage from volatile capacitive storage; and a recoding mechanism to eliminate and reassign inactive categories. A small scale 1.2 μm feature size CMOS prototype with 4 inputs and 8 output categories has been designed and fabricated. The unit cell which performs the fuzzy min and learning operations measures 100 μm by 45 μm. Experimental results are included to illustrate performance of the unit cell

Keywords

CMOS integrated circuits; VLSI; adaptive systems; fuzzy systems; learning (artificial intelligence); mixed analogue-digital integrated circuits; neural chips; pattern classification; real-time systems; 1.2 mum; 100 mum; 45 mum; CMOS prototype; Fuzzy Adaptive Resonance Theory; asynchronous mixed analog-digital VLSI architecture; charge leakage; classification; embedded refresh mechanism; fuzzy ART; learning; learning operations; memory drift; real-time; recoding mechanism; unit cell; volatile capacitive storage; Analog-digital conversion; Equations; Flexible printed circuits; Hardware; Performance evaluation; Prototypes; Resonance; Subspace constraints; Uncertainty; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.703997

Filename

703997