DocumentCode
1603078
Title
Generating a hierarchical simulation model on the basis of functional model of register transfers
Author
Uchida, Takeshi ; Kiya, Hitoshi ; Yamada, Akihiko
Author_Institution
Dept. of Electron. & Inf. Eng., Tokyo Metropolitan Univ., Japan
Volume
4
fYear
1996
Firstpage
830
Abstract
We propose two abstraction methods: behavioral abstraction and temporal abstraction. These methods make it possible to generate each simulation model at different levels of abstraction and construct an algorithm generating this model on the basis of a functional model of register transfers
Keywords
data flow computing; performance evaluation; real-time systems; virtual machines; behavioral abstraction; functional model; hierarchical simulation model; processor simulation; register transfers; retargetable models; simulation model; temporal abstraction; Analytical models; Application software; Automata; Clocks; Electronic mail; Hardware; Numerical analysis; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location
Atlanta, GA
Print_ISBN
0-7803-3073-0
Type
conf
DOI
10.1109/ISCAS.1996.542153
Filename
542153
Link To Document