Title :
Lower bound based DDD minimization for efficient symbolic circuit analysis
Author :
Manthe, Alicia ; Shi, C. J Richard
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
fDate :
6/23/1905 12:00:00 AM
Abstract :
The determinant decision diagram (DDD) is a variant of binary decision diagrams (BDDs) for representing symbolic matrix determinants and cofactors in symbolic circuit analysis. Inspired by the ideas of Rudell (1993) and Drechsler et al. (2001) on BDD minimization, we present a lower-bound based sifting algorithm for reordering the DDD vertices to minimize the DDD size. Our contributions are (1) an adaptation of Rudell´s sifting technique for DDD minimization with new rules for determining vertex signs, and (2) tighter lower bounds developed specifically for DDDs. On a set of DDD examples from symbolic circuit analysis, experimental results have demonstrated that the proposed lower-bound based reordering algorithm can effectively reduce DDD sizes. It has also been demonstrated that sifting with lower bounds uses about 50% less computation compared to sifting without using lower bounds, and sifting with the new lower bounds reduces the computation further by up to 8% compared to sifting with Drechsler´s lower bounds for BDDs
Keywords :
binary decision diagrams; circuit analysis computing; directed graphs; binary decision diagrams; determinant decision diagram; lower-bound based reordering algorithm; lower-bound based sifting algorithm; symbolic circuit analysis; symbolic matrix determinants; vertex signs; Algorithm design and analysis; Binary decision diagrams; Boolean functions; Circuit analysis; Data structures; Engineering profession; Minimization methods; Radio frequency; Runtime;
Conference_Titel :
Computer Design, 2001. ICCD 2001. Proceedings. 2001 International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-7695-1200-3
DOI :
10.1109/ICCD.2001.955054