DocumentCode :
1603724
Title :
A novel design concept for high density hybrid CMOS-nanomagnetic circuits
Author :
Das, Jayita ; Alam, Syed M. ; Bhanja, Sanjukta
Author_Institution :
Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA
fYear :
2012
Firstpage :
1
Lastpage :
6
Abstract :
In this paper we have presented a novel design concept in hybrid CMOS-Nanomagnetic logic architecture and have shown it for a 2-input XOR. This paradigm is based on Shannon´s expansion theorem and distributes the role of logic computation between the spin transfer torque magnetic tunnel junctions (STT-MTJs) and the CMOS metal lines. A 81.25% reduction in cell count and more than 75% reduction in energy consumption is achieved with this design strategy. The concept can be extended to any n-input XOR and other suitable logic functions.
Keywords :
CMOS logic circuits; logic design; magnetic tunnelling; nanomagnetics; 2-input XOR; CMOS metal lines; STT-MTJ; Shannon expansion theorem; cell count; design concept; design strategy; energy consumption; high density hybrid CMOS-nanomagnetic circuits; hybrid CMOS-nanomagnetic logic architecture; logic computation; n-input XOR; spin transfer torque magnetic tunnel junctions; suitable logic functions; Clocks; high density nanomagnetic logic; low power;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on
Conference_Location :
Birmingham
ISSN :
1944-9399
Print_ISBN :
978-1-4673-2198-3
Type :
conf
DOI :
10.1109/NANO.2012.6322169
Filename :
6322169
Link To Document :
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