• DocumentCode
    1604914
  • Title

    High aspect ratio TSVs in micropin-fin heat sinks for 3D ICs

  • Author

    Dembla, Ashish ; Zhang, Yue ; Bakir, Muhannad S.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Future high performance 3D systems require a systematic co-design of their electrical interconnect network and their heat removal mechanism. This paper presents fine pitch (35 μm) and high aspect ratio (20:1) TSVs integrated in a benchmarked micropin-fin heat sink capable of removing power density of 100 W/cm2/tier at a junction temperature below 50 °C.
  • Keywords
    heat sinks; integrated circuit design; integrated circuit interconnections; three-dimensional integrated circuits; 3D IC; benchmarked micropin-fin heat sink; electrical interconnect network; heat removal mechanism; high aspect ratio TSV; high performance 3D systems; power density removal; systematic codesign; Fluid flow measurement; Heat engines; Heat sinks; Heating; Integrated circuits; Lead; Performance evaluation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on
  • Conference_Location
    Birmingham
  • ISSN
    1944-9399
  • Print_ISBN
    978-1-4673-2198-3
  • Type

    conf

  • DOI
    10.1109/NANO.2012.6322214
  • Filename
    6322214