High-Level Synthesis: Boosting Designer Productivity and Reducing Time to Market

Chip design complexity has been increasing over the years-from a few million transistors a few decades ago, it has now increased to billions of transistors on a single chip. For those of you who have designed a chip or studied digital system design using hardware description languages (HDL) like Verilog and VHDL, you would likely agree that it takes much effort to design such systems using these languages. Not only does one need to possess an intricate knowledge of digital circuits, but he/she also needs to be efficient in realizing them using these languages. It is easy to see that if the digital system being designed grows in complexity, so does the effort required by a designer.