Title :
VAX vector architecture
Author :
Bhandarkar, Dileep ; Brunner, Richard
Author_Institution :
Digital Equipment Corp., Boxboro, MA, USA
Abstract :
The VAX architecture has been extended to include an integrated, register-based vector processor. This extension allows both high-end and low-end implementations and can be supported with only small changes by VAX/VMS and VAX/ULTRIX operating systems. The extension is effectively exploited by the new vectorizing capabilities of VAX Fortran. Features of the VAX vector architecture and the design decisions which make it a consistent extension of the VAX architecture are discussed
Keywords :
DEC computers; computer architecture; VAX architecture; VAX vector architecture; VAX/ULTRIX; VAX/VMS; register-based vector processor; Availability; Computer architecture; Costs; Floating-point arithmetic; Memory management; Processor scheduling; Scientific computing; Supercomputers; Vector processors; Very large scale integration;
Conference_Titel :
Computer Architecture, 1990. Proceedings., 17th Annual International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-8186-2047-1
DOI :
10.1109/ISCA.1990.134527
