Design, simulation and modelling for nanopackaging applications: current capabilities and future requirements

Summary form only given. The electronics packaging industry is undergoing dramatic changes due to the market need for increased product functionality, miniaturisation and reliability. According to the ITRS roadmap future higher value systems will combine the latest advances in System on Chip (More-Moore) with the diversification provided by System in Package (More-Than-Moore). System in Package and Wafer Level Packaging, with the introduction of nanotechnology (e.g. Carbon Nanotubes), provides the ability to integrate components with different functions (Digital, Analogue, RF, Optical, MEMS, etc) resulting in greater product functionality all in a smaller space. These trends are placing severe demands on the packaging design engineer in terms of optimising electrical, thermal and reliability performance. Design for X (DfX; X=Manufacturability, Packaging, Test, Reliability, etc) methodologies and associated software tools play a very important part in product design and development. This presentation will discuss the latest trends and developments in design, modelling and simulation for nanopackaging applications. The use of Multi-Physics/scale modelling tools will be discussed and examples provided demonstrating the use of molecular dyanimics and finite element modelling and the coupling techniques used to link results at the atomistic scale to the mico and maco scales.