DocumentCode
1605602
Title
Direct implementation of 2-D DCT on a low-cost linear-array architecture without intermediate transpose memory
Author
Hsiao, Shen-Fu ; Tseng, Jian-Ming
Author_Institution
Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear
1999
fDate
6/21/1905 12:00:00 AM
Firstpage
90
Lastpage
99
Abstract
A direct method for the computation of 2-D DCT on a linear-array architecture is presented. The original 2-D DCT is converted into 1-D problem with representation of matrix-vector product. Then, we propose a fast algorithm with low computation complexity, and exploit an efficient mapping technique to generate from the algorithm a hardware-efficient architecture. Unlike other 2-D DCT processors that usually require transpose memory, our new architecture is easily pipelined for purpose of high throughput rate and is easily scalable for the computation of longer-length DCT
Keywords
computational complexity; discrete cosine transforms; 2-D DCT; computation complexity; direct implementation; hardware-efficient architecture; high throughput rate; linear-array architecture; low-cost linear-array architecture; matrix-vector product; Arithmetic; Computer architecture; Discrete cosine transforms; Image coding; Matrix converters; Matrix decomposition; Memory architecture; Pipelines; Throughput; Two dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on
Conference_Location
Taipei
ISSN
1520-6130
Print_ISBN
0-7803-5650-0
Type
conf
DOI
10.1109/SIPS.1999.822314
Filename
822314
Link To Document