Title :
6×6 DPCNN: a programmable mixed analogue-digital chip for cellular neural networks
Author :
Salerno, Mario ; Sargeni, Fausto ; Bonaiuto, Vincenzo
Author_Institution :
Dept. of Electron. Eng., Rome Univ., Italy
Abstract :
The implementation of a versatile VLSI chip represents an important step to develop cellular neural networks (CNN). In this paper a VLSI realization of the multi-chip oriented, 6×6 digitally programmable cellular neural network (6×6 DPCNN) chip, is presented. This chip covers most of the available one-neighbourhood templates for image processing applications. Moreover, it can be easily interconnected to others to form very large CNN arrays
Keywords :
CMOS integrated circuits; VLSI; cellular neural nets; image processing; mixed analogue-digital integrated circuits; multichip modules; neural chips; neural net architecture; CMOS IC; VLSI; cellular neural networks; current mode; digitally programmable chip; multichip algorithm; neural net chip; programmable mixed analogue-digital chip; Artificial neural networks; Cellular neural networks; Digital control; Equations; Hardware; Image processing; Integrated circuit interconnections; Transconductance; Very large scale integration; Voltage;
Conference_Titel :
Cellular Neural Networks and their Applications, 1996. CNNA-96. Proceedings., 1996 Fourth IEEE International Workshop on
Conference_Location :
Seville
Print_ISBN :
0-7803-3261-X
DOI :
10.1109/CNNA.1996.566616
