• DocumentCode
    1606015
  • Title

    Run-time reconfigurable hybrid multiprocessor cores

  • Author

    Astarloa, Armando ; Bidarte, Unai ; Zuloaga, Aitzol ; Arias, Jagoba ; Jimenez, Joaquin

  • Author_Institution
    Dept. of Electron. & Telecommun., Basque Univ., Bilbao, Spain
  • Volume
    3
  • fYear
    2004
  • Firstpage
    1345
  • Abstract
    In this paper we present the application of a novel dynamic partial reconfiguration framework, called Tornado, to a hybrid (hardware and software) core. The target is an intelligent ATA host core with two tiny embedded microprocessors. We evaluate the implementation results of the reconfigurable core and its integration into a CSoPC design with others Tornado compatible modules.
  • Keywords
    embedded systems; microprocessor chips; reconfigurable architectures; Tornado compatible modules; dynamic partial reconfiguration framework; embedded microprocessors; intelligent host core; run-time reconfigurable hybrid multiprocessor cores; Application software; Circuits; Embedded system; Energy management; Field programmable gate arrays; File systems; Hardware; Microprocessors; Power system management; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Technology, 2004. IEEE ICIT '04. 2004 IEEE International Conference on
  • Print_ISBN
    0-7803-8662-0
  • Type

    conf

  • DOI
    10.1109/ICIT.2004.1490756
  • Filename
    1490756