• DocumentCode
    1606022
  • Title

    Characteristics of loop unrolling effect: software pipelining and memory latency hiding

  • Author

    Hiroyuki, Sato ; Teruhiko, YOSHIDA

  • Author_Institution
    Univ. of Tokyo, Japan
  • fYear
    2001
  • fDate
    6/23/1905 12:00:00 AM
  • Firstpage
    63
  • Lastpage
    72
  • Abstract
    Recently loop unrolling has been shown in a new light from the superscalar architectural point of view. In this paper, we show that in addition to superscalar effect and scalar replacement effect, loop unrolling can hide memory latency, and that the combination of those effects improve the performance of loop unrolling. A major contribution of this paper is that the analysis is done symbolically and quantitatively. Although they have been known as major reasons that affect the performance of loop unrolling, no quantitative approach has not been tried. Our analysis can make clear the behaviour of superscalar functions and memory latency hiding in loop unrolling
  • Keywords
    parallel architectures; performance evaluation; pipeline processing; loop unrolling; memory latency; performance; software pipelining; superscalar architectures; Parallel architectures;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Innovative Architecture for Future Generation High-Performance Processors and Systems, 2001
  • Conference_Location
    Maui, HI
  • ISSN
    1537-3223
  • Print_ISBN
    0-7695-1309-3
  • Type

    conf

  • DOI
    10.1109/IWIA.2001.955198
  • Filename
    955198