Title :
Advantage of Floating Gate B4-Flash over Retention Reliability after Cycling - Characterization by Variation of Transconductance
Author :
Shukuri, S. ; Ajika, N. ; Shimizu, S. ; Mihara, M. ; Kawajiri, Y. ; Ogura, T. ; Kobayashi, K. ; Nakashima, M.
Author_Institution :
GENUSION Inc., Amagasaki
Abstract :
This paper describes the reliability characteristics evaluation results of floating gate type B4-flash (back bias assisted band-to-band tunneling induced hot electron injection flash) with statistics. Data retention reliability of B4-flash with N+gate and P-channel memory cell utilizing B4-HE program and FN channel erase is evaluated extensively under bake temperature of -24C to 250 C up to 7000hrs after I k to 1M E/W cycles, by novel evaluation method of correlating Vt shifts and gm variations. No leaky bit failure can be seen in B4-flash with thicker than 9 nm tunnel oxide and the Vt shifts during retention bake is associated with electron detrapping and move into floating gate from tunnel oxide, which is verified by correlating Vt shifts and gm variations. Tunnel oxide thickness dependence on retention reliability is also studied and confirmed to have excellent retention characteristics under 150 C after 100 k cycling. In the case of 7 nm tunnel oxide thickness device, some leaky bits due to stress induced leakage current (SILC) can be seen even in B4-flash, nevertheless number of tail bits is remarkably reduced compared with that of conventional N+gate, N-channel NOR flash. According to all the obtained results show that B4-flash can achieve excellent retention reliability after cycling with high speed programmability.
Keywords :
NOR circuits; circuit reliability; flash memories; hot carriers; leakage currents; N-channel NOR flash; P-channel memory cell; band-to-band tunneling induced hot electron injection flash; data retention reliability; floating gate B4-flash over retention reliability; high speed programmability; reliability characteristics evaluation; stress induced leakage current; transconductance; tunnel oxides; Channel hot electron injection; Electron traps; Flash memory; Leakage current; Nonvolatile memory; Statistics; Stress; Temperature dependence; Transconductance; Tunneling;
Conference_Titel :
Non-Volatile Semiconductor Memory Workshop, 2008 and 2008 International Conference on Memory Technology and Design. NVSMW/ICMTD 2008. Joint
Conference_Location :
Opio
Print_ISBN :
978-1-4244-1546-5
Electronic_ISBN :
978-1-4244-1547-2
DOI :
10.1109/NVSMW.2008.10