Title :
A co-design based high-performance real-time GIS
Author :
Badawy, Wael M. ; Kumar, Ashok ; Bayoumi, Magdy A.
Author_Institution :
Center for Adv. Comput. Studies, Univ. of Southwestern Louisiana, Lafayette, LA, USA
fDate :
6/21/1905 12:00:00 AM
Abstract :
This paper presents a co-design approach for implementing the map overlaying operation for a high-performance real-time geographical information system (GIS). The map overlaying is the most important but also the most computation-intensive operation in GIS systems. Development of an embedded environment for attaining high performance is achieved by implementing a certain computational core in hardware which is efficiently used by software. The methodology partitions the hardware/software parts based on evaluation of a cost function. The hardware core is simulated using VerilogXL and prototyped in VLSI using Synopsys and Cadence, while the software part is implemented using C++. The performance studies show that the average response time using the proposed co-design is 70 times faster than an all-software solution. The proposed co-design approach results in impressive throughput improvement without sacrificing any flexibility
Keywords :
VLSI; geographic information systems; hardware-software codesign; real-time systems; C++; Cadence; Synopsys; VLSI; VerilogXL; average response time; co-design based high-performance real-time GIS; computational core; cost function evaluation; embedded environment; hardware core simulation; high-performance real-time geographical information system; map overlaying operation; performance; prototyping; software; throughput improvement; Computational modeling; Cost function; Embedded computing; Embedded software; Geographic Information Systems; Hardware; High performance computing; Information systems; Real time systems; Software performance;
Conference_Titel :
Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on
Conference_Location :
Taipei
Print_ISBN :
0-7803-5650-0
DOI :
10.1109/SIPS.1999.822346