DocumentCode :
1606481
Title :
Automatic error pattern generation for design error detection in a design validation simulation system
Author :
Kang, Sungho ; Szygenda, Stephen A.
Author_Institution :
Comput. Eng. Res. Center, Austin, TX, USA
fYear :
1992
Firstpage :
533
Lastpage :
536
Abstract :
Considering the fact that simulation patterns can detect a different number of design errors, the derivation of efficient simulation patterns is important. Automatic error pattern generation is introduced to generate a set of error simulation pattern which can be used as input stimuli for design error simulation, a design validation tool which provides a measure of simulation coverage. These tools provide a solution to a long standing problem that has limited design options and design cycle time. They also can decrease design and testing costs
Keywords :
automatic testing; digital simulation; integrated circuit testing; logic testing; design cycle time; design error detection; design errors; design validation simulation system; design validation tool; error pattern generation; input stimuli; simulation coverage; simulation patterns; Analytical models; Automatic test pattern generation; Circuit faults; Circuit simulation; Computational modeling; Computer errors; Computer simulation; Design engineering; Pattern analysis; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
Type :
conf
DOI :
10.1109/ASIC.1992.270205
Filename :
270205
Link To Document :
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