DocumentCode
1606664
Title
Si Nanocrystal Split Gate Technology Optimization for High Performance and Reliable Embedded Microcontroller Applications
Author
Kang, Sung-Taeg ; Yater, Jane ; Hong, CheongMin ; Shen, James ; Ellis, Nicole ; Herrick, Matthew ; Gasquet, Horacio ; Malloch, Wendy ; Chindalore, Gowrishankar
Author_Institution
Technol. Solutions Organ., Freescale Semicond., Inc., Austin, TX
fYear
2008
Firstpage
59
Lastpage
60
Abstract
In this paper, the authors present the performance characteristics of such a silicon nanocrystal split gate bitcell and report an optimal bitcell process and integration scheme for memory arrays.
Keywords
elemental semiconductors; embedded systems; microcontrollers; nanostructured materials; semiconductor storage; silicon; Si; Si nanocrystal split gate technology optimization; embedded microcontroller; memory arrays; optimal bitcell process; silicon nanocrystal split gate bitcell; CMOS technology; Dielectrics; Fabrication; Implants; Microcontrollers; Nanocrystals; Nonvolatile memory; Oxidation; Silicon; Split gate flash memory cells;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Semiconductor Memory Workshop, 2008 and 2008 International Conference on Memory Technology and Design. NVSMW/ICMTD 2008. Joint
Conference_Location
Opio
Print_ISBN
978-1-4244-1546-5
Electronic_ISBN
978-1-4244-1547-2
Type
conf
DOI
10.1109/NVSMW.2008.23
Filename
4531823
Link To Document