Title :
Using VHDL for modeling and design of processing units
Author :
Navabi, Zainalabedin
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
Abstract :
The use of VHSIC hardware description language (VHDL) for the design and implementation of a CPU structure is presented. The CPU is described at the behavioral level. This design phase is followed by the actual design of the CPU. For this purpose, a more detailed description of hardware is developed at the dataflow level, and includes register and bus structure details of the hardware. Simulation verifies the register transfer level implementation of the hardware. The next phase is the actual wiring of the hardware. Behavioral and dataflow description styles of an 8-b processing system are illustrated. A simple peripheral device for this CPU is shown
Keywords :
instruction sets; logic CAD; specification languages; 8 bit; CPU structure; VHDL; VHSIC hardware description language; behavioral level; bus structure; dataflow level; modeling; peripheral device; processing units; register transfer level implementation; Automatic control; Central Processing Unit; Circuits; Design methodology; Fabrication; Hardware design languages; Printers; Process design; Registers; Wiring;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270227
