Title :
Use of VHDL synthesis in an advanced digital design course
Author_Institution :
Dept. of Electr. Eng., Mississippi State Univ., MS, USA
Abstract :
A VHSIC hardware description language (VHDL) synthesis tool is used for an advanced digital design course. The tool has the capability of synthesizing sequential elements (flip-flops) as well as combinational logic. The tool gives students the capability of practising a true top-down design methodology. Synthesis implementation targets include the ITD standard cell library (Octtools), Xilinx field programmable gate array (FPGA), Actel FPGA, and Altera FPGA
Keywords :
circuit CAD; computer aided instruction; educational courses; logic CAD; specification languages; Actel FPGA; Altera FPGA; HDL; ITD standard cell library; Octtools; VHDL synthesis; VHSIC hardware description language; Xilinx; advanced digital design course; combinational logic; field programmable gate array; flip-flops; sequential elements design; top-down design methodology; Design automation; Design methodology; Education; Fabrication; Field programmable gate arrays; Flip-flops; Gas discharge devices; Logic design; Programmable logic arrays; Software libraries;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270238
