Title :
45nm CMOS platform technology (CMOS6) with high density embedded memories
Author :
Iwai, M. ; Oishi, A. ; Sanuki, T. ; Takegawa, Y. ; Komoda, T. ; Morimasa, Y. ; Ishimaru, K. ; Takayanagi, M. ; Eguchi, K. ; Matsushita, D. ; Muraoka, K. ; Sunouchi, K. ; Noguchi, T.
Author_Institution :
Syst. LSI division, Toshiba Corp., Yokohama, Japan
Abstract :
This paper describes the first 45nm Node CMOS technology (CMOS6) with optimized Vdd, EOT and BEOL parameters. For this technology to be applicable from high performance CPU to mobile applications, three sets of core devices are presented which are compatible with 0.069um2 trench capacitor DRAM and 0.247um2 6Tr.SRAM embedded memories.
Keywords :
CMOS integrated circuits; DRAM chips; SRAM chips; 45nm CMOS platform technology; SRAM embedded memories; high density embedded memories; high performance CPU; mobile applications; trench capacitor DRAM; CMOS technology; Capacitors; Dielectric thin films; Energy consumption; Large scale integration; Leakage current; MOS devices; Random access memory; Research and development; Semiconductor device manufacture;
Conference_Titel :
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8289-7
DOI :
10.1109/VLSIT.2004.1345364
