A Current-mode CMOS Sample-and-Hold Circuit for ADC

Author

Mahatthumthanant, Phinet ; Kamsri, Thawatchai ; Petchmaneelumka, Wandee ; Sungkabunchoo, Tiparat ; Riewruja, Vanchai

Author_Institution

Fac. of Eng., King Mongkut´´s Inst. of Technol., Bangkok

fYear

2006

Firstpage

5758

Lastpage

5761

Abstract

This paper presents a current-mode sample-and-hold circuit using 0.5 mum CMOS technology. The input signal is sampled using a current subtracter and a half wave rectifier instead of a sampling switch used in the conventional sample-and-hold circuit. As a result, the switch feedthrough error is eliminated. The proposed circuit achieves high sampling frequency up to 100 MHz and high accuracy. The performances of the proposed circuit are demonstrated by PSPICE simulation results

Keywords

CMOS integrated circuits; SPICE; analogue-digital conversion; rectifying circuits; sample and hold circuits; signal sampling; 0.5 micron; ADC; CMOS technology; PSPICE simulation; current subtracter; current-mode sample-and-hold circuit; half wave rectifier; signal sampling; Breakdown voltage; CMOS technology; Clocks; Detectors; Frequency; Rectifiers; Sampling methods; Switches; Switching circuits; Voltage control; Current-mode; Half-wave rectifier; Sample-and-hold; Subtracter;

fLanguage

English

Publisher

ieee

Conference_Titel

SICE-ICASE, 2006. International Joint Conference

Conference_Location

Busan

Print_ISBN

89-950038-4-7

Electronic_ISBN

89-950038-5-5

Type

conf

DOI

10.1109/SICE.2006.314649

Filename

4108606

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1607910