Title :
A synthesis system for communication protocols
Author :
Krishnakumar, A.S.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
Abstract :
A system for synthesizing custom hardware implementations from formal descriptions of communication protocols is described. This system allows different target technologies. The protocol to be synthesized is designed in the formal specification language APSL (Augmented Protocol Specification Language). This specification is analyzed, and a behavioral description of hardware for implementing this specification is generated. Different techniques are used to generate concise descriptions. A gate-level design is synthesized from this description using the behavioral synthesis system BESTMAP. This design can be mapped onto a standard library or onto programmable gate arrays or any other suitable technology. This system is used to implement a controller for the FDDI MAC layer protocol
Keywords :
FDDI; formal languages; formal specification; logic arrays; protocols; specification languages; telecommunications computing; APSL; Augmented Protocol Specification Language; BESTMAP; FDDI MAC layer protocol; behavioral description; behavioral synthesis system; communication protocols; custom hardware implementations; formal descriptions; formal specification language; gate-level design; programmable gate arrays; standard library; Automatic control; Control system synthesis; Control systems; FDDI; Formal specifications; Hardware; Laboratories; Libraries; Network synthesis; Protocols;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270284
