Resonator based digital filters using field programmable gate array elements

A resonator based digital filter (RBDF) implementation is presented using field programmable gate array (FPGA) elements. The realization is based on the common structure developed for recursive discrete transforms. The globally parallel property of the recursive structure is maintained, while the arithmetic operations are realized by bit-serial logic. Least significant bit (LSB) first arithmetic combined with memory table based distributed vector multipliers gives an area effective realization. Third generation FPGA devices provide efficient tools to built up DSP signal flow graphs (SFGs). An automatic filter design tool is under development, which will directly compile the netlist file from the filter coefficients