Damage-free CMP towards 32nm-node porous low-k (k = 1.6)/Cu integration

Author

Kondo, S. ; Yoon, B.U. ; Lee, S.G. ; Tokitoh, S. ; Misawa, K. ; Yoshie, T. ; Ohashi, N. ; Kobayashi, N.

Author_Institution

Semicond. Leading Edge Technol. Inc., Ibaraki, Japan

fYear

2004

Firstpage

68

Lastpage

69

Abstract

To reduce the effective dielectric constant (k_eff) to less than 2.6 for the 45-nm node, direct CMP of a high-modulus porous MSQ (p-MSQ) film (k=2.3, E=10GPa) without a protective cap layer has been successfully applied to 300mm-wafer Cu damascene fabrication by using damage-free CMP process. This process can be extended to the 32nm-node ultra low-k (ULK, k=1.6) CMP with a relatively low-k protective layer by using a newly developed plasma treatment for promoting adhesion, that supports the poor mechanical properties of ULK films (E<1GPa).

Keywords

adhesion; chemical mechanical polishing; dielectric thin films; integrated circuit interconnections; permittivity; 32 nm; 32nm-node porous low-k/Cu integration; Cu; adhesion; damage-free CMP; effective dielectric constant; plasma treatment; protective cap layer; Adhesives; Chemical processes; Chemical technology; Cleaning; Delamination; Mechanical factors; Protection; Slurries; Surface treatment; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8289-7

Type

conf

DOI

10.1109/VLSIT.2004.1345397

Filename

1345397