DocumentCode :
16087
Title :
dAElite: A TDM NoC Supporting QoS, Multicast, and Fast Connection Set-Up
Author :
Stefan, Radu Andrei ; Molnos, Anca ; Goossens, Kees
Author_Institution :
Eindhoven Univ. of Technol., Eindhoven, Netherlands
Volume :
63
Issue :
3
fYear :
2014
fDate :
Mar-14
Firstpage :
583
Lastpage :
594
Abstract :
Networks-on-Chip (NoC) are seen as promising interconnect solutions, offering the advantages of scalability and high-frequency operation which the traditional bus interconnects lack. Several NoC implementations have been presented in the literature, some of them having mature tool-flows. The main differentiating factor between the various implementations is the set of services and communication patterns they offer to the end-user. In this paper we present dAElite, a TDM Network-on-Chip that offers a unique combination of features, namely, guaranteed bandwidth and latency per connection, built-in support for multicast, and a short connection set-up time. While our NoC was designed from the ground up, we leverage on existing tools for network dimensioning, analysis, and instantiation. We have implemented and tested our proposal in hardware and we compared it to Æthereal, a state-of-the-art NoC with similar features, but no multicast. We find that the connection set-up time is reduced by a factor of 10 and the network traversal latency is decreased by 33 percent. Moreover, considering realistic values of the network parameters, dAElite has a lower hardware area when synthesized in 65 nm technology.
Keywords :
multicast protocols; multiprocessor interconnection networks; network-on-chip; time division multiplexing; Æthereal comparison; QoS; TDM NoC; TDM network-on-chip; built-in multicast support; bus interconnect; connection latency; dAElite; fast connection set-up; guaranteed bandwidth; high-frequency operation; interconnect solution; network analysis; network dimensioning; network instantiation; network parameters; network traversal latency; Bandwidth; Network interfaces; Nickel; Radiation detectors; Routing; Schedules; Time division multiplexing; Hardware implementation; circuit-switching networks; network architecture and design;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2012.117
Filename :
6212450
Link To Document :
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