A novel 3-D magnetic field sensor in standard CMOS technology

The authors present a 3-D magnetic field sensor in a standard 2 mu m CMOS technology. The sensor uses two CMOS compatible 1-D vertical magnetotransistors positioned at a right angle to each other to measure two field components, and a MAGFET and/or a lateral bipolar transistor is used to measure the third component. The two base contacts minimize the offset due to asymmetry during fabrication. The MOS device controls the base surface potential and thereby improves the sensitivity and the noise performances and minimizes the cross-sensitivity in the lateral device. Simulations were performed to study the electrical characteristics and to determine the optimized geometry for achieving high current gain by using the 2-D device simulation software PISCES-IIB. The device shows a relative sensitivity of S/sub rx/=1.05/T, S/sub ry/=0.75/T, and S/sub rz/=0.25/T in X-, Y-, and Z-directions, respectively, to the applied magnetic field.<>