Heterogeneous integration: Beyond CMOS – coping with variability at the end of the CMOS roadmap

By 2020 it is very likely that nano-CMOS will reach the end of the scaling roadmap. Current 32nm CMOS production technology already is hampered by large variations in electrical parameters, with impacts on performance predictability, power consumption limitations and design closure for complex systems. Heterogeneous integration is the roadmap to lower cost and yet more advanced and innovative functionalities on silicon, with new and more manageable challenges. There will be no end nor a definite demise of silicon technology. While there are uncertainties as to what will be the show-stoppers for the down-scaling of nano-CMOS, there is a large number of transitional and compatible to CMOS technologies that will be more important than just 2-D scaling. This talk discusses variability among other limitations that bring the end of 2-D scaling and also proposes a likely scenario for hardware technology evolution and related challenges for integrating systems in the next 20 years. The scenario beyond the end of the roadmap is drawn, in which heterogeneous integration at the device level as well as at the system level will bring new frontiers to the ULSI era of tera-scale integration. Transitional technologies like 3-D integration by through-silicon vias, carbon-based electron devices, and even magnetic materials devices will co-exist and be built upon a basic CMOS-like technology platform.