Title :
Early wirability checking and 2D congestion-driven circuit placement
Author :
Tsay, Ren-Song ; Chang, S.C. ; Thorvaldson, John
Author_Institution :
IBM, Yorktown Heights, NY, USA
Abstract :
An effective congestion-driven placement algorithm that uses initial global routing model for congestion analysis and optimization is proposed. The approach has been used for rescuing many difficult chip designs when intensive rip-up and remote technique could not complete the wiring. It is demonstrated that the congestion cost evaluation step of the algorithm can be used as an accurate early wirability checking utility
Keywords :
network routing; network topology; optimisation; wiring; 2D congestion-driven circuit placement; chip designs; congestion analysis; cost evaluation; initial global routing model; optimization; wirability; wirability checking utility; Circuits; Costs; Design optimization; Job design; Production; Routing; Timing; Very large scale integration; Wire; Wiring;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270308
