DocumentCode
1609429
Title
Understanding stress enhanced performance in Intel 90nm CMOS technology
Author
Giles, M.D. ; Armstrong, M. ; Auth, C. ; Cea, S.M. ; Ghani, T. ; Hoffmann, T. ; Kotlyar, R. ; Matagne, P. ; Mistry, K. ; Nagisetty, R. ; Obradovic, B. ; Shaheed, R. ; Shifren, L. ; Stettler, M. ; Tyagi, S. ; Wang, X. ; Weber, Charles ; Zawadzki, K.
Author_Institution
Technol. CAD, Intel Corp., Hillsboro, OR, USA
fYear
2004
Firstpage
118
Lastpage
119
Abstract
A hierarchical, model-based understanding of the key physical effects underlying stress-induced device performance gain is presented, focusing on the large gains seen for uniaxial PMOS stress conditions and the vertical stress impact on NMOS gain.
Keywords
CMOS integrated circuits; integrated circuit modelling; stress effects; 90 nm; Intel 90nm CMOS technology; NMOS gain; stress enhanced performance; stress-induced device performance gain; uniaxial PMOS stress conditions; vertical stress impact; Analytical models; CMOS technology; Germanium silicon alloys; MOS devices; Performance gain; Semiconductor device modeling; Silicon germanium; Tensile stress; Thermal stresses; Uniaxial strain;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN
0-7803-8289-7
Type
conf
DOI
10.1109/VLSIT.2004.1345427
Filename
1345427
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