Title :
Low power Fast Ethernet equalizer
Author :
Richter, A. ; Ellinger, F. ; Lindner, Bastian
Author_Institution :
Circuit Design & Network Theor., Tech. Univ. Dresden, Dresden, Germany
Abstract :
A low power adaptive analog cable equalizer has been designed in 0.18 μm CMOS technology for 100 Mb/s Fast Ethernet. The equalizer can compensate skin losses of cables with lengths up to 100 m. Furthermore it also incorporates compensation of flat loss and DC-shifts. Hence this equalizer performs compensation of all relevant Fast Ethernet signaling issues. The circuit consumes only 10.1 mW from 1.8 V supply, which to the best of our knowledge is the lowest power consumption reported to date.
Keywords :
CMOS integrated circuits; equalisers; local area networks; CMOS technology; Ethernet signaling; ethernet equalizer; low power adaptive analog cable equalizer; power consumption; skin losses compensation; Attenuation; Equalizers; Frequency response; Gain; Power demand; Resistors; Transfer functions; Fast Ethernet; analog equalizer; front end; low power; receiver;
Conference_Titel :
Circuits, Systems, Communication and Information Technology Applications (CSCITA), 2014 International Conference on
Conference_Location :
Mumbai
DOI :
10.1109/CSCITA.2014.6839234
