DocumentCode
160955
Title
A systematic map method for realizing minimal logic functions of arbitrary number of variables
Author
Rathore, T.S. ; Jain, Abhishek
Author_Institution
Electron. & Telecommun. Eng., St Francis Inst. of Technol., Mumbai, India
fYear
2014
fDate
4-5 April 2014
Firstpage
81
Lastpage
86
Abstract
A map method for reducing a logic function to its minimal form is presented. The function of N variables is first mapped into an m× n map such that m + n = N. Next the map size is reduced by 50% rows or columns by eliminating one of the variables at a time vertically or horizontally. The procedure is repeated till the size of the map becomes 1×1. Because of the inbuilt simplification of logic expressions, the resulting function is minimal. The method is systematic and definitely leads to the minimal function. It is simpler in operation than that based on only Boolean identities, Karnaugh map and Quine-McCluskey methods. It can handle any number of variables. It is explained with several examples.
Keywords
logic circuits; Boolean identity; Karnaugh map; N variable function; Quine-McCluskey methods; logic expressions; minimal logic functions; systematic map method; Communications technology; Conferences; Digital circuits; Information technology; Logic functions; Roads; Systematics; Digital Circuits; Logic Functions; Map Method; Minimal Realizations; Truth Table Method;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits, Systems, Communication and Information Technology Applications (CSCITA), 2014 International Conference on
Conference_Location
Mumbai
Type
conf
DOI
10.1109/CSCITA.2014.6839239
Filename
6839239
Link To Document