DocumentCode :
1609763
Title :
Effects of barrier height (ΦB) and the nature of bi-layer structure on the reliability of high-k dielectrics with dual metal gate (Ru & Ru-Ta alloy) technology
Author :
Kim, Y.H. ; Choi, R. ; Jha, R. ; Lee, J.H. ; Misra, V. ; Lee, J.C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
fYear :
2004
Firstpage :
138
Lastpage :
139
Abstract :
In this work, we present the effects of barrier height on the reliability of HfO2 with dual metal gate technology in terms of Weibull slope, soft breakdown characteristics, defect generation rate, critical defect density and charge-to-breakdown. It was found that the lower Weibull slope of high-k dielectrics (compared to SiO2) is partially attributed to the lower barrier height of high-k dielectrics which in turn results in larger current increase. Thus, defect generation rate increases and charge-to-break down decreases, while critical defect density remains constant. In addition, it has been found that there is distinct bi-modal defect generation rate for high-k/SiO2 stack. Two-step breakdown process was clearly observed; and Weibull slope of soft breakdown (1st breakdown) shows lower β value compared to that of hard breakdown (2nd breakdown). Soft breakdown characteristics were dependent on the barrier heights. The bi-modal defect generations are believed to be resulted from the breakdown in interface and bulk layer.
Keywords :
CMOS integrated circuits; DRAM chips; dielectric thin films; electric breakdown; hafnium compounds; integrated circuit reliability; permittivity; ruthenium; ruthenium alloys; semiconductor-insulator boundaries; tantalum alloys; HfO2; Ru; RuTa; Weibull slope; barrier height; bi-layer structure; charge-to-breakdown; critical defect density; defect generation rate; dual metal gate technology; high-k dielectrics; reliability; soft breakdown characteristics; two-step breakdown process; Character generation; Dielectric substrates; Electric breakdown; Electrodes; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Leakage current; Stress; Thickness control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8289-7
Type :
conf
DOI :
10.1109/VLSIT.2004.1345439
Filename :
1345439
Link To Document :
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