DocumentCode :
1609990
Title :
A K-band CMOS cascode power amplifier using optimal bias selection methodology
Author :
Hsu, Yu-Chung ; Chen, Yi-Shin ; Tsai, Tzung-Chuen ; Lin, Kun-You
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2011
Firstpage :
793
Lastpage :
796
Abstract :
A fully integrated K-band power amplifier is designed and fabricated in 0.18-μm CMOS technology in this paper. The conventional cascode power amplifier benefits from high gain and output power, but the efficiency is not well discussed before. In this study, the voltage variation and the large-signal performance of cascode PA are analyzed, and the new design strategy for the optimal bias selection has been developed to enhance the efficiency of cascode PA without sacrificing other performance. The measurement results show 18-dBm output power at peak power added efficiency (PAE) of 18.9% and 16.8- dBm 1-dB compression power (P1dB) with 15.5% of PAE under 2.7-V bias supply. The difference between the power at P1dB and at peak PAE is reduced to 1.2 dB.
Keywords :
CMOS analogue integrated circuits; integrated circuit design; integrated circuit manufacture; microwave integrated circuits; microwave power amplifiers; K-band CMOS cascode power amplifier; optimal bias selection methodology; power added efficiency; size 0.18 mum; voltage 2.7 V; CMOS integrated circuits; CMOS technology; Gain; Logic gates; Power amplifiers; Power generation; Transistors; CMOS; bias selection; cascode; power amplifier;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference Proceedings (APMC), 2011 Asia-Pacific
Conference_Location :
Melbourne, VIC
Print_ISBN :
978-1-4577-2034-5
Type :
conf
Filename :
6173870
Link To Document :
بازگشت