Hierarchical layout design of power SiGe HBTs

Author

Leqi Zhang ; Jun Fu ; Liyang Pan ; Yudong Wang ; Bo Song ; Jie Cui ; Wei Zhang ; Zhihong Liu

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2014

fDate

7-10 May 2014

Firstpage

1

Lastpage

2

Abstract

We discuss the influence of parasitic network resulting from the interconnection layout on power performance of SiGe power HBTs (Heterojunction Bipolar Transistor) under RF(Radio Frequency) operation conditions. It is found that the differences in quiescent operating point between the combining units are caused by the distribution of parasitic interconnection resistances and that the output power of the SiGe power HBTs will sooner or later get smaller than expected in proportion to device size because of this heterogeneity. By analyzing the simulation results we´ve got, a hierarchical layout design of high-power devices is proposed and verified practically by designing, fabricating and characterizing several SiGe HBTs.

Keywords

Ge-Si alloys; heterojunction bipolar transistors; interconnections; power bipolar transistors; semiconductor materials; SiGe; heterojunction bipolar transistor; hierarchical layout design; high-power devices; interconnection layout; parasitic interconnection resistance distribution; parasitic network; power HBTs; quiescent operating point; radiofrequency operation conditions; Gain; Heterojunction bipolar transistors; Layout; Power amplifiers; Power generation; Radio frequency; Silicon germanium; SiGe HBTs; hierarchical layout design; high-power; parasitic network;

fLanguage

English

Publisher

ieee

Conference_Titel

Next-Generation Electronics (ISNE), 2014 International Symposium on

Conference_Location

Kwei-Shan

Type

conf

DOI

10.1109/ISNE.2014.6839338

Filename

6839338