• DocumentCode
    1611209
  • Title

    The revolutionary and truly 3-dimensional 25F2 SRAM technology with the smallest S3 ( stacked single-crystal Si) cell, 0.16um2, and SSTFT (atacked single-crystal thin film transistor) for ultra high density SRAM

  • Author

    Jung, Soon-Moon ; Jang, Jaehoon ; Cho, Wonseok ; Moon, Jaehwan ; Kwak, Kunho ; Choi, Bonghyun ; Hwang, ByunEjun ; Lim, Hoon ; Jeong, Jaehun ; Kim, Jongliyuk ; Kim, Kinam

  • Author_Institution
    R&D Center, Samsung Electron., Kyunggi-Do, South Korea
  • fYear
    2004
  • Firstpage
    228
  • Lastpage
    229
  • Abstract
    The smallest 25F2 SRAM cell size of 0.16um2 is realized by S3 cell technology and SSTFT with 193nm ArF lithography process. The stacked single-crystal thin film is developed and used for the first time in the SRAM cell to make the SRAM products comparative to the DRAM products in the density and the cost. The load PMOS and pass NMOS transistors are stacked over the planar pull-down NMOS transistors to drastically reduce the cell size. In this study, the dream of truly 3D memory device is achieved by fabricating 64M bit density SRAM.
  • Keywords
    MOSFET; SRAM chips; elemental semiconductors; silicon; thin film transistors; 3D memory device; SRAM technology; stacked single-crystal Si; stacked single-crystal thin film transistor; ultra high density SRAM; Lithography; MOS devices; MOSFETs; Moon; Random access memory; Research and development; Semiconductor films; Stacking; Thin film transistors; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
  • Print_ISBN
    0-7803-8289-7
  • Type

    conf

  • DOI
    10.1109/VLSIT.2004.1345495
  • Filename
    1345495