Title :
A 70nm NOR flash technology with 0.049 μm2 cell size
Author :
Park, Chankwang ; Sim, Sangpil ; Han, Jungin ; Jeong, Chul ; Jang, Younggoan ; Park, Junghwan ; Kim, Jaehoon ; Park, Kyucham ; Kim, Kinam
Author_Institution :
Semicond. R & D Center, Samsung Electron. Co., Ltd., Youngin, South Korea
Abstract :
A 70nm NOR flash technology has been for the first time developed with a cell size of 0.0494m, which is the smallest size of NOR flash cell, for high density memory of mobile application. The operation of 0.049PM cell transistor is successfully achieved with three key technologies such as an optimized Self-Aligned Poly (SAP) structure with top corner rounding trench structure, a cell drain contact process by ArF photo lithographic tool, and a cell transistor with a gate length of 120nm.
Keywords :
NOR circuits; flash memories; nanolithography; ultraviolet lithography; 70 nm; 70nm NOR flash technology; Self-Aligned Poly structure; cell size; cell transistor; gate length; high density memory; mobile application; top corner rounding trench structure; Consumer electronics; Doping profiles; Flash memory; Manufacturing processes; Mobile handsets; Nonvolatile memory; Parasitic capacitance; Pulp manufacturing; Space technology; Synthetic aperture sonar;
Conference_Titel :
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8289-7
DOI :
10.1109/VLSIT.2004.1345501
