DocumentCode
1611500
Title
Current-mode CMOS realization of a multiple-valued logic neurode
Author
Abd-El-Barr, M.H. ; Bolton, R.J. ; Jain, A.K.
Author_Institution
Saskatchewan Univ., Saskatoon, Sask., Canada
fYear
1993
fDate
6/15/1905 12:00:00 AM
Firstpage
201
Lastpage
207
Abstract
A new circuit is proposed for the realization of a multiple-valued logic (MVL) neurode, an electronic approximation of a human neuron, in a current-mode CMOS logic (CMCL) technology. A set of multiple-valued logic operators is presented. These operators include min, tsum, window literal, cycle, and complement. Basic circuits used to realize the MVL-neurode are also given. HSPICE simulation results to verify the operation of the MVL-neurode circuit are reported.
Keywords
CMOS integrated circuits; SPICE; integrated logic circuits; logic design; many-valued logics; neural chips; transient response; HSPICE simulation; MVL-neurode; complement; current-mode CMOS logic; cycle; min; multiple-valued logic neurode; transient analysis; tsum; window literal; CMOS logic circuits; CMOS technology; Circuit simulation; Humans; Integrated circuit interconnections; Logic circuits; Logic devices; Neurons; Telecommunications; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
WESCANEX 93. 'Communications, Computers and Power in the Modern Environment.' Conference Proceedings., IEEE
Conference_Location
Saskatoon, Sask., Canada
Print_ISBN
0-7803-1319-4
Type
conf
DOI
10.1109/WESCAN.1993.270575
Filename
270575
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