• DocumentCode
    1611550
  • Title

    Functional partitioning for hardware-software codesign using genetic algorithms

  • Author

    Hidalgo, J.I. ; Lanchares, J.

  • Author_Institution
    Dept. de Inf. y Autom., Univ. Complutense de Madrid, Spain
  • fYear
    1997
  • Firstpage
    631
  • Lastpage
    638
  • Abstract
    Hardware-software partitioning is one of the most important issues of codesign of embedded systems because it is made at the beginning of the cycle of design. In terms of costs and delays, final results will strongly depend on partitioning. In this work we address the functional partitioning problem of hardware-software codesign using a genetic algorithm. Experimental results includes a comparative study with three algorithms: simulated annealing, Fiduccia-Matheyses and a modified version of this with an improvement of results.
  • Keywords
    genetic algorithms; high level synthesis; real-time systems; simulated annealing; software engineering; Fiduccia-Matheyses; costs; delays; embedded systems; functional partitioning; genetic algorithms; hardware-software codesign; hardware-software partitioning; simulated annealing; Computer architecture; Costs; Embedded software; Embedded system; Genetic algorithms; Hardware; Partitioning algorithms; Power generation economics; Process design; Programmable logic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    EUROMICRO 97. New Frontiers of Information Technology., Proceedings of the 23rd EUROMICRO Conference
  • Conference_Location
    Budapest, Hungary
  • ISSN
    1089-6503
  • Print_ISBN
    0-8186-8129-2
  • Type

    conf

  • DOI
    10.1109/EURMIC.1997.617393
  • Filename
    617393