DocumentCode
1611925
Title
Parallel Motion Compensation Interpolation in H.264/AVC Using Graphic Processing Units
Author
Zhang, Liye ; Wang, Jian ; Chu, Chen ; Ji, Xiaoyong
Author_Institution
Sch. of Electr. Sci. & Eng., Nanjing Univ., Nanjing, China
fYear
2012
Firstpage
767
Lastpage
771
Abstract
Motion compensation interpolation is an important part in H.264 codec. With the growing interest on high-definition (HD) contents, it is important to find methods to reduce the time cost of motion compensation interpolation which has greatly hindered the implementation of real time coding for HD contents. In this paper, a forward step is developed towards the implementation of interpolation algorithm into a Graphic Processing Units (GPU) using Compute Unified Device Architecture (CUDA). The proposed algorithm has achieved high parallelism on GPU at pixel level. Experimental results show our proposed solution on GPU can be up to 193.61% over traditional method on Central Processing Unit (CPU) without introducing any distortions and leads to a CPU usage reduction at the same time, since the massive parallel processing capability of GPU is efficiently harnessed.
Keywords
graphics processing units; high definition video; parallel architectures; parallel processing; video coding; CPU; CUDA; GPU; H.264/AVC; HD content real-time coding; central processing unit; compute unified device architecture; graphic processing units; high-definition content; parallel motion compensation interpolation; parallel processing; Encoding; Graphics processing unit; Interpolation; Motion compensation; Parallel processing; Video coding; Videos; GPU; data parallel; motion compensation;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Control and Electronics Engineering (ICICEE), 2012 International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4673-1450-3
Type
conf
DOI
10.1109/ICICEE.2012.205
Filename
6322494
Link To Document