Exploring the design space of a superscalar implementation

Instruction set architecture, processor implementation, compiler, performance, and cost all influence the design of a superscalar implementation of a pipelined processor. The authors focus on processor implementation and performance by presenting a methodology to explore the superscalar implementation design space. After the parameters in the design space have been identified, this methodology is applied to the Intel 80960CA instruction set architecture and compiler to produce performance curves to obtain performance differences of various implementation features. For a given performance range, regions of the design space which do not satisfy the performance requirements are discarded, and regions of the design space which do satisfy the performance requirements need to be examined further. The performance curves serve as a guide to reducing the design space.