DocumentCode
1612242
Title
Optimized queue based communication in VLSI using a weakly ordered binary heap
Author
Scholze, Stefan ; Henker, Stephan ; Partzsch, Johannes ; Mayr, Christian ; Schuffny, Rene
Author_Institution
Inst. of Circuits & Syst., Univ. of Technol. Dresden, Dresden, Germany
fYear
2010
Firstpage
316
Lastpage
320
Abstract
For event based routing using global timestamps a sorting and buffering component is required. This work describes the implementation of a priority queue algorithm applying a binary heap structure, which efficiently combines the data storage and the reordering according to the data timestamp. For operation only two main functionalities are required, which insert and retrieve elements while assuring the heap property. The developed algorithmic enhancements offer significant optimisation of the runtime behaviour compared to standard heap algorithms and allow the usage of SRAM as storage memory, which provides substantial reduction of silicon area. The algorithms are implemented in UMC 180 nm technology and integrated into a large-scale VLSI routing system.
Keywords
SRAM chips; VLSI; circuit optimisation; network routing; queueing theory; UMC technology; buffering component; data storage; event-based routing; global timestamps; large-scale VLSI routing system; optimized queue-based communication; priority queue algorithm; size 180 nm; sorting component; weakly-ordered binary heap; Arrays; Artificial neural networks; Hardware; Memory management; Pediatrics; Random access memory; Sorting; VLSI priority queue; binary heap implementation; timestamp routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems (MIXDES), 2010 Proceedings of the 17th International Conference
Conference_Location
Warsaw
Print_ISBN
978-1-4244-7011-2
Electronic_ISBN
978-83-928756-4-2
Type
conf
Filename
5551325
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