• DocumentCode
    1612473
  • Title

    Comparative study on multistage amplifier and folded cascode amplifier design in sample and hold circuit using 0.18μm CMOS technology

  • Author

    Hassan, Siti Lailatul Mohd ; Halim, Ili Shairah Abd ; Rahim, A´zraa Afhzan Abd ; Aziz, N.B.A. ; Yaakub, Tuan Norjihan Tuan

  • Author_Institution
    Fac. of Electr. Eng., Univ. Teknol. MARA, Shah Alam, Malaysia
  • fYear
    2012
  • Firstpage
    29
  • Lastpage
    34
  • Abstract
    This paper presents the comparison between multistage amplifier and folded cascode amplifier design using 0.18μm CMOS technology. The objective of this project is to compare gain and power dissipation between these two design models. Sample and hold circuit (SHC) is the main component in pipelined ADC. Designing a low power, high gain SHC is crucial, that is the main reason why multistage amplifier is applied in this project. Implementation has been done in 0.18μm technology, for a 5MHz sampling frequency, considering 1.2 Vpp voltage and 1.8V voltage supply using SILVACO EDA tools. From the simulation, the multistage amplifier consumes 0.139mW power and has gain of 94.64dB. The folded cascode amplifier has 6.5mW power dissipation and 70dB gain. From the simulation results, the multistage amplifier is better in term of gain and power dissipation than the folded cascode design.
  • Keywords
    CMOS analogue integrated circuits; amplifiers; analogue-digital conversion; integrated circuit design; pipeline processing; power supplies to apparatus; sample and hold circuits; ADC; CMOS technology; SILVACO EDA tools; design models; folded cascode amplifier; folded cascode amplifier design; gain dissipation; high gain SHC; multistage amplifier; power 0.139 mW; power 6.5 mW; power dissipation; sample and hold circuit; sampling frequency; size 0.18 mum; voltage 1.2 V; voltage 1.8 V; voltage supply; CMOS integrated circuits; Capacitors; Clocks; Power demand; Simulation; Switches; Transistors; ADC; Multistage amplifier; folded cascode amplifier; low power consumption; sample and hold circuit;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Applications and Industrial Electronics (ISCAIE), 2012 IEEE Symposium on
  • Conference_Location
    Kota Kinabalu
  • Print_ISBN
    978-1-4673-3032-9
  • Type

    conf

  • DOI
    10.1109/ISCAIE.2012.6482062
  • Filename
    6482062