Fault isolation and failure analysis techniques for high density packaging

Author

Trigg, A.D.

Author_Institution

Inst. of Microelectron., Singapore

fYear

2004

Firstpage

93

Lastpage

98

Abstract

New developments in electronic packaging, higher density, new materials, the use of three dimensional chip stacks, packaging for photonics and the proliferation of so many different package types, pose serious challenges to the ability to locate and discover the root cause of failures within those packages. This paper highlights those challenges, identifies the tools currently being used and the new developments needed to enable the challenges to be met.

Keywords

failure analysis; fault location; integrated circuit packaging; integrated circuit testing; integrated optics; semiconductor device packaging; 3D chip stacks; electronic packaging; failure analysis techniques; fault isolation tools; high density packaging; photonics packaging; root cause determination; Acoustic testing; Circuit faults; Conducting materials; Delamination; Electronics packaging; Failure analysis; Integrated circuit interconnections; Integrated circuit packaging; Optical devices; Semiconductor device packaging;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2004. IPFA 2004. Proceedings of the 11th International Symposium on the

Print_ISBN

0-7803-8454-7

Type

conf

DOI

10.1109/IPFA.2004.1345554

Filename

1345554