Characterization of split gate flash memory endurance degradation mechanism

Author

Wu, T.I. ; Chih, Y.D. ; Chen, S.H. ; Wang, Wayne ; Chang, Mi-Chang ; Shih, J.R. ; Chin, H.W. ; Wu, Kenneth

Author_Institution

Nonvolatile Memory Libr. Dept., Taiwan Semicond. Manuf. Co. Ltd., Taiwan

fYear

2004

Firstpage

115

Lastpage

117

Abstract

In this paper, the weak erase failure mechanism of a source side injected split gate flash memory after endurance (ENDU) cycling test has been identified through a 2T cell structure. In general, charge trapping in the inter poly oxide (IPO) after Fowler Nordheim tunneling erase is considered to dominate the weak erase failure. However from this study, it is found that cell current reduction after erase is not due to erase-induced tunneling oxide degradation. On the contrary, program-induced electron trapping in the coupling oxide dominates the cell current reduction after long term endurance cycling stress.

Keywords

PLD programming; dielectric thin films; electron traps; failure analysis; flash memories; integrated circuit reliability; integrated circuit testing; integrated memory circuits; microprogramming; tunnelling; Fowler Nordheim tunneling erase; IPO; cell current reduction; charge trapping; coupling oxide; endurance cycling test 2T cell structure; erase-induced tunneling oxide degradation; inter poly oxide; long term endurance cycling stress; program-induced electron trapping; source side injected split gate flash memory; split gate flash memory endurance degradation mechanism; weak erase failure mechanism; Character generation; Degradation; Electron traps; Failure analysis; Flash memory; Nonvolatile memory; Performance evaluation; Split gate flash memory cells; Testing; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2004. IPFA 2004. Proceedings of the 11th International Symposium on the

Print_ISBN

0-7803-8454-7

Type

conf

DOI

10.1109/IPFA.2004.1345561

Filename

1345561