• DocumentCode
    1612935
  • Title

    Hybrid pin control using boundary-scan and its applications

  • Author

    Ke, Wuudiann

  • Author_Institution
    Lucent Technol., AT&T Bell Labs., Princeton, NJ, USA
  • fYear
    1996
  • Firstpage
    44
  • Lastpage
    49
  • Abstract
    Boundary-Scan (B-S) has been widely used for interconnect testing. It allows all pins of a B-S chip to be controlled uniformly by either system or B-S logic. The requirement that all pins are controlled by the same logic limits B-S usage for many applications. We propose a new B-S instruction, called PINCONTROL, to allow mixed control of chip pins. That is, each pin can be individually configured to be controlled by the system or B-S logic. In this paper we shall demonstrate the application of this instruction for fault injection and inter-chip path delay testing
  • Keywords
    boundary scan testing; integrated circuit interconnections; integrated circuit testing; B-S instruction; B-S logic; PINCONTROL; boundary-scan; fault injection; hybrid pin control; inter-chip path delay testing; interconnect testing; Circuit faults; Control systems; Delay; Fault tolerant systems; Logic; Pins; Registers; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 1996., Proceedings of the Fifth Asian
  • Conference_Location
    Hsinchu
  • ISSN
    1085-7735
  • Print_ISBN
    0-8186-7478-4
  • Type

    conf

  • DOI
    10.1109/ATS.1996.555135
  • Filename
    555135