On the projections of affine recurrence equations

The authors present a synthesis method for mapping affine recurrence equations (AREs) onto multi-rate arrays. Previous attempts at mapping AREs onto systolic arrays are discussed. Some notations and definitions related to the specifications of the VLSI arrays are introduced. A VLSI is defined in two steps: a pre-array is first defined which is a partitioning of the problem domain; then a VLSI array is defined which is a space-time domain. The mapping from the problem domain onto the pre-array and the mapping of the pre-array onto the VLSI array are also defined.