DocumentCode
1613805
Title
A system for synthesizing abstraction-enabled simulators for binary code verification
Author
Gückel, Dominique ; Brauer, Jörg ; Kowalewski, Stefan
Author_Institution
Embedded Software Lab., RWTH Aachen Univ., Aachen, Germany
fYear
2010
Firstpage
118
Lastpage
127
Abstract
Formal verification of embedded software is crucial in safety-critical applications, ideally requiring as little human intervention as possible. Binary code model checking based on hardware simulators already comes close to this goal, although with high initial effort for developing a simulator of the respective target platform. In the embedded systems domain with its varieties of different architectures in use, this can severely restrict the applicability of this approach. To remedy this drawback, we describe a system for automatically synthesizing simulators, which are suited for model checking in that they support automatic abstraction. We evaluate the practicality of this approach by synthesizing simulators for the Atmel ATmega16 and Intel MCS-51 microcontrollers.
Keywords
embedded systems; formal verification; program diagnostics; safety-critical software; Atmel ATmega16; Intel MCS-51 microcontrollers; abstraction enabled simulator; automatic abstraction; binary code model checking; binary code verification; embedded software; formal verification; hardware simulators; safety-critical applications; Binary codes; Encoding; Hardware; Load modeling; Microcontrollers; Random access memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Embedded Systems (SIES), 2010 International Symposium on
Conference_Location
Trento
Print_ISBN
978-1-4244-5839-4
Electronic_ISBN
978-1-4244-5840-0
Type
conf
DOI
10.1109/SIES.2010.5551382
Filename
5551382
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